DA1453x bootROM boot specific configuration Limitation

ID: LPCBARESDK-753

Status: Open

First reported: 6.0.14.1114

Fixed in: TBD

Description

There is a limitation in the bootrom when the user programs the OTP to the address 0x7F87FC8 to boot from specific serial port and when the two-wire UART configuration is set (Bits[31:24]).

In development mode, when the user programs “0x00FFABAA” (Two-wire UART configuration UART_TX/UART_RX is P0_0/P0_1) to the address “0x7F87FC8” the “Boot from Specific” flag (0xAA) is programmed and new pin locations for booting from an external SPI slave is set.

Boot specific configuration

First the system will try to boot from UART. In this case, obviously, it will not get a response (because the SPI interface is used for booting), at the end of this step the booter mistakenly does not reset the P0_0 pin.

The next step in the boot sequence (the path where the boot specific flag is set) is to go to the SPI boot and try to detect a SPI slave device.

At the end of the SPI boot the booter will reset the used SPI pins and re-enable HW reset. This is where the issue arises, as P0_0 is still set to UART_TX (HIGH) the chip will reset instantly.

Booting sequence

Workaround

Two workarounds are available:

  • Instead of two wires UART, Set 1 wire UART (P0_5 to UART_TX)in the boot configuration of the OTP. As an example: consider this new SPI pin assignment SPI-CLK:P0_4 SPI-CS:P0_8 SPI-MISO:P0_3 SPI-MOSI:P0_6

  • On address 0x7F87FC8 the application should program: 0x02FFABAA

  • On address 0x7F87FCC the application should program: 0x03060804

  • Burn new secondary bootloader in the OTP, this will replace the default ROM bootloader, you can refer to the section 6.2 in UM-B-119: SW Platform reference manual.

reference: