8. Test Jig Design Considerations

After choosing the PLT to aid in production test development for ones application, much of the engineering effort is relieved and handled by the PLT. But not all production test development tasks can be solved by a generic solution. The design of a test Jig is one of those tasks that cannot be made generic because every application board and every production line is different.

8.1. DUT design

An important aspect of test jig design is not a part of the test jig at all. It is the design constraints that the test jig design imposes on the application design. These are constraints such as probig accessibility of nets by using test pads. Or layout constraints such as pad-to-pad clearance to accommodate for test probe fixation on the test jig. Considerations like these are commonly known as design for test (DFT) requirements. Some DFT requirements are a direct result of using the various functions of the PLT, and others are indirectly required because a test jig must be designed to make an interconnection between the PLT and the DUT. The direct requirements are straight forward and listed below.

Table 2 DFT hardware requirements
#	Requirement	Description
1	Power	The PLT needs to power the DUT, so access to the VBAT/VCC net is required. Unless the application is powered externally, in which case the reset signal (Requirement #?) must be connected
2	Ground	The ground (GND) of the DUT must be available to be probed by the test jig for the PLT to function
3	Serial RX	The serial RX signal must be probed by the test jig ^[1]
4	Serial TX	The serial TX signal must be probed by the test jig ^[1]

^[1] When using one wire uart, the RX and TX are connected together on the PLT side

8.2. Test Jig Mechanical Design

Each DUT is unique and may require a unique approach to the mechanical design of the test fixture. Hence it is not possible to cover all possibilities in this guide. This guide will cover the major topics and overall considerations.

Warning

Test jig design requires particular knowledge and skills that are not used often, and is easy to get wrong. This guide will not cover all aspects of the design and is merely meant to provide a basic understanding.

Tip

Third party services that offer complete fixture solutions exist in most areas.

8.2.1. Test Connector

A simple but effective way to connect the DUT to the test equipment is by using a (dedicated) test connector. This connector should have the signals from Table 2 available as a minimum. The type of connector to use is free to choose but one particular range of connector stands out; the component-less connector. These are connectors like board edge connector where the board is inserted into the connector or a “plug of nails” connector where the connector latches onto holes in the test board making contact with test pads.

Figure 36 Example of a plug of nails connector

Component-less connectors can save a lot in material cost because there is no mating part needed on the DUT. It can however be labor intensive to connect each DUT separately to the test equipment. Especially if many DUT’s are tested in parallel (like in a panel), a test connector might not be the best option.

8.2.2. Bed of Nails

A bed of nails test fixture is a type of test fixture where contact is made to the DUT using probes. Such a test fixture usually consists of a top fixture and a bottom fixture.

The top fixture (usually made from clear acrylic) is responsible to pushing down the DUT onto the bottom using nylon pushers. The DUT rests on the support probes which can be identified by the non-conductive caps. When the top fixture pushes down on the DUT PCB, it will overcome the spring force in the support probes and make contact with the different measurement probes. There are two different types of measurement probes in Figure 37. Probes with sharp points to probe test pads and crowned probes better suited for through hole probing. Many more types of probes exists, all for different applications.

Just like there are many different probe types to contact the DUT, there are also many ways to connect the probes to the test equipment. In Figure 38, a few ways of connecting are depicted.

The first three receptacles on the left of the image, are wire wrapping probe receptacles. This is an older technique where wires are wrapped around the probe receptacle which is still used ofen in In-Circuit Testing (ICT) equipment. This technique is useful for prototyping because there is no custom test PCB involved (please check :numref:to-section-about-twisting-wires when using this technique for prototyping).

The three probe recaptacles in the middle are receptacles that also have spring loaded probes on the bottom side to connect with a test jig PCB. This is the most reliable and durable way of connecting test jigs to probes. The downside is the added complexity because a jig PCB is needed as well as a bottom support plate that prevents the jig PCB from flexing under the spring load of the receptacles.

The right most method of connecting test probes to the test equipment is by soldering the probes directly to the jig PCB. This is less complex and also very reliable, with the downside that maintenance (replacing probes) involves de-soldering the old probes which might reduce the lifespan of the test fixture.

Note

Always follow the manufacturer’s recommendations when using test probes and receptacles.

8.3. Test Jig Electrical Design

8.3.1. Schematic

The schematic of the test jig can be as simple as taking the requirements from Table 2 and turning this into a netlist. However, one might also consider additional requirements like being able to switch the UART signals from the PLT to another test solution for testing other components of the system.

When connecting the PLT to supply the power rail of the DUT, it is important to consider what else is connected to that net. Some components (like power circuitry) might not be rated to allow for backfeeding, or must be kept in a certain reset state when backfeeding.

Another component that requires extra care is any (host) controller that shares the serial (RX TX) lines that the PLT must use to communicate to the DUT. If the RX TX lines are shared in such a manner, it’s often necessary to activate the Power On Reset (POR) of the component sharing the serial bus.

8.3.2. PCB

When a PCB is used to provide the interconnection between the DUT and the test jig, the following recommendations should be considered.

Keep the trace lengths as short as possible to minimize signal degradation.
Route RX / TX traces over a solid ground plane to provide a consistent return path and reduce noise.
The single-ended impedance of the RX / TX signal traces should be controlled to ensure signal integrity and minimize reflections. The target impedance for the UART traces is 50 ohms.

8.3.3. Cable Harness

When cables are needed in a test jig, the following recommendations can be used to improve the connections between PLT and DUTs Keep the lengths of the cables as short as possible.

When possible use twisted pair cables instead of separate cables for:
- GND/VBAT
- GND/TxD
- GND/RxD
- GND/VPP
Use ferrite beads for noise reduction in cables

Figure 39 Example of twisted pair cable with 4 pairs and ferrite
Connect pull-down resistors at the end of the PLT TX signal lines. Use a 4.7 kΩ resistor at PLT DUT Connector Pin 7 (DUT TX) with the other end connected to ground. In total 16 resistors must be mounted, one for each PLT DUT connector.
Connect a pull-down resistor as close as possible to the UART RX signal connector on the DUT. The value should be approximately 4.7 kΩ. Connect the other end of the resistor to ground.
Use gold plated contacts in the connections between the PLT and the DUTs.
Use extra drivers in the UART lines.
Use series resistors of approximately 100 Ω in the UART lines, one mounted at the beginning and one at the end of the signal lines.

Note

Start with the simple solutions first by testing them one-by-one for stability.

8.3.4. RF

It is recommended to place all DUTs an equal distance from the RFTU antenna around the axis of symmetry to simplify the setup.

Hint

Path losses can be configured per DUT in the setup, allowing to compensate non-symmetric test jigs.