1. Abstract

This document describes the architecture and usage of System RAM memory in DA1470x. It gives an analysis of the way a project configures the system’s RAM through linker scripts and the way changes are made according to custom needs. DA1470x SNC template project is used as an example. Finally, the mem_report python script is also presented and used on the example project, to verify the result of the changes.

2. Figures

Figure 1 Memory Access by Each System Master

Figure 2 Memory Controller Masters Access Metrics

Figure 3 Memory sections/software blocks matrix of os_app_retarget application

Figure 4 Memory sections/project files matrix of the “application” software block of os_app_retarget application

Figure 5 Memory sections/software blocks matrix of the os_snc_retarget application before adding extra data

Figure 6 Memory sections/software blocks matrix of the os_snc_retarget application after adding extra data

Figure 7 Memory sections/ project files matrix of the “application” part of os_snc_retarget application, before adding extra shared data

Figure 8 Memory sections/ project files matrix of the “application” part of os_snc_retarget application, after adding extra shared dataa

Figure 9 Memory sections/project files matrix of the “snc” part of os_snc_retarget application, before adding extra shared data

Figure 10 Memory sections/software parts matrix of the “snc” part of os_snc_retarget application, after adding extra shared data

3. Terms and Definitions

SysCPU System CPU

SNC Sensor Node Controller

CM33 Arm Cortex-M33

CM0+ Arm Cortex-M0+

CMAC Configurable MAC

GPU Graphics Processing Unit

DMA Direct Memory Access

MTB Micro Trace Buffer

OQSPI Octa/Quad - Serial Protocol Interface

XIP Execute In Place

DRBG Deterministic Random Bit Generator

TRNG True Random Number Generation

bss block starting symbol

IVT Interrupt Vector Table

4. References

DA1470x, Datasheet, Revision 3.0, Dialog Semiconductor.