3. QSPI Memory Driver

Using a custom QSPI memory requires the creation of a driver for the custom device and subsequently making this driver visible to the firmware loader tools and to the firmware itself. For products of the DA1459x family, the process of the driver creation has been simplified into the making of a simple c header file. The driver header file consists of a configuration object of structure qspi_flash_config_t as well as a set of callback and helper functions. When creating a new driver it is advised to use qspi_XXX_template.h as a basis, which can be found along with the other QSPI Memory Drivers under {SDK_root}/sdk/memory/include folder.

3.1. Configuration Structure

The qspi_flash_config_t structure is defined in qspi_common.h header file which can be found under {SDK_root}/sdk/memory/include folder. Fill in the required fields after consulting the datasheet of the QSPI Memory device used.

3.1.1. QSPI Flash configurations

Table 1 qspi_flash_config_t

Field	Type	Description
.jedec	jedec_id_t	This corresponds to the JEDEC ID structure.
.size_bits	uint32_t	This represents the capacity of the storage device in bits.
.address_size	HW_QSPI_ADDR_SIZE	Desired Addressing Mode. Either 24-bit or 32-bit addressing will be used when accessing the device. Please note that not all devices support both addressing modes.
.clk_mode	HW_QSPI_CLK_MODE	Mode 0 QSPI_SCK is low when QSPI_CS is high. Mode 1 QSPI_SCK is high when QSPI_CS is high.
.read_instr_cfg	hw_qspi_read_instr_config_t	Read instruction configuration struct
.erase_instr_cfg	hw_qspi_erase_instr_config_t	Erase instruction configuration struct
.read_status_instr_cfg	hw_qspi_read_status_instr_config_t	Read status register instruction configuration struct
.write_enable_instr_cfg	hw_qspi_write_enable_instr_config_t	Write enable instruction configuration struct
.page_program_instr_cfg	hw_qspi_page_program_instr_config_t	Page program instruction configuration struct
.suspend_resume_instr_cfg	hw_qspi_suspend_resume_instr_config_t	Program and erase suspend/resume instruction configuration struct
.delay	qspi_delay_t	QSPI memory delays struct
.callback	qspi_callback_t	This is the QSPI Memory Device initialization and status callbacks.
.resume_before_writing_regs	bool	Resume the flash memory before writing the status register or any other configuration registers. Some flash memories reject these commands while being in erase suspend mode, thus a flash erase resume command must be issued in advance. This setting is in scope only when the background flash operations are enabled. Check the manufacturer datasheet and set this flag accordingly. If the implementation of the sys_clk_cfg_cb() doesn’t make use of the aforementioned commands this flag must be false.

Warning

if Device Autodetect is used, the firmware will first issue a READ_JEDEC_ID (9Fh) command to the device to retrieve three bytes that uniquely identify the QSPI Memory. These three bytes that were returned are then checked against every configuration object of every driver that is part of Device Autodetect. If they match with .manufacturer_id, .device_type and .device_density fields of any configuration object, the initialization of the QSPI Memory occurs according to that configuration object’s fields.

Note

Tool uartboot loader which is responsible for downloading firmware to the Flash or RAM, uses dg_configFLASH_AUTODETECT by default.

3.2. Extra Driver Components

Other than the configuration object, a driver should contain the definitions of the callback functions as well as functions that provide non-standard functionality and which could also be called by the callback functions.Such functions’ range of operations could vary from performing optional to essential tasks to the proper operation of the device.

One such example could be writing directly to the second byte of status register or driving the output signal. In most cases they are not mandatory for operating the device however they are helpful.

Another example could be reading or writing to a register which is non accessible through Write Status Register command (01h).