DA1453x Hardware Design Examples
Description
For DA1453x, Renesas provides Design Examples files to help customers develop their PCB. These examples show a minimum size layout using the minimum number of external components on a 2-layer PCB. For details on layout guidelines and component selection, see the Application Note AN-B-075 for DA14531 and AN-B-098 for DA14535, both available on the Renesas website.
Note
DA1453x is refering to DA14531-00, DA14531-01, DA14530 and DA14535.
The DA14531-00 is the main DA14531 device. The -00 is just a new naming to introduce the variant DA14531-01. The DA14531-01 is a ROM variant of the main DA14531-00.
The DA14535 is a DA14531 upgrade.
The following Design Examples files are available: - Boost configuration: better power efficiency at low supply voltage - Buck configuration: better power efficiency at high supply voltage - Bypass mode: lowest cost because no inductor is used. DCDC converter is disabled, resulting in a lower power efficiency
The provided Design Examples files contain the following components:
For DA14531 chip in contains the 24 pin FCGQFN and 17 pin WLCSP packages.
For DA14535 chip in contains the 24 pin FCGQFN package.
The AT25DF011 Flash
32 MHz XTAL
Inductor (Buck and Boost only)
De-coupling/matching components
PCB Antenna
A small strip antenna design is connected to the chip antenna port. The antenna efficiency and radiation patterns are described in the DA14535 Module Datasheet and the DA14535 Module Datasheet.
For different antenna designs, see the following documents:
The Allergo Design Examples (FCGQFN and WLCSP) are delivered as a .zip file and contain the following items:
- Source_da14531-ed-xxxxx
da14531-ed-xxxxx.brd: Allegro .pcb layout design files
DA14531-ED-xxxxx.DSN: Allegro schematic design files
- Tapeout_da14531-ed-xxxxx
da14531-ed-xxxxx_BOM.xlsx: Bill Of Materials
da14531-ed-xxxxx_PCB.pdf: .pdf layout files
da14531-ed-xxxxx_SCH.pdf: .pdf schematic files
gerber-da14531-ed-xxxxx.zip: gerber files
odbjob-da14531-ed-xxxxx.tgz: ODB++ manufacturing data
For the DA14531, the design example files are created in Allegro, while for the DA14531 and DA14535, the design example files are created in Altium according to the DA1453x design guidelines. However, these files have not undergone performance verification or regulatory approval. These hardware design examples are provided “as is,” without any warranty.
For the verified design examples, see the DA14531 Development Kit PRO Daughterboard Design Files available on the Renesas website or the DA14531 module and DA14535 Module Datasheet and the DA14535 Module Datasheet. designs that is certified across regions and provides significant savings in development cost and time-to-market.
Revision history
Revision |
Date |
Description |
---|---|---|
1.3 |
24-Sep-2024 |
Add Altium version of DA14531 and DA14535 QFN Example Designs. |
1.2 |
22-Aug-2022 |
Changed to Renesas Template |
1.1 |
15-Sept-2020 |
Added WLCSP files |
1.0 |
29-July-2020 |
Initial version for QFN package |