3. Analyzing The Demonstration Example

This section analyzes an application example which demonstrates using the SPI adapters. The example is based on the freertos_retarget sample code found in the SDK. It adds an additional freeRTOS task which is responsible for controlling an external SPI module, connected on SPI1 bus. It also enables the wake-up (WKUP) timer for handling external events. Both synchronous and asynchronous SPI operations are demonstrated.

3.1. Application Structure

  1. The key goal of this demonstration is for the device to perform a few SPI operations following an event. For demonstration purposes the K1 button on the Pro DevKit has been configured as a wake-up input pin. For more information on how to configure and set a pin for handling external events, please read the External Interruption tutorial. At each external event, produced at every K1 button press, a dedicated callback function named wkup_cb() is triggered. In this function, a freeRTOS signal named signal_MCP4822 is sent towards the prvSPITask_MCP_4822 application task to unblock its execution.

  1. Depending on the value of the SPI_ASYNC_EN macro, a synchronous or an asynchronous SPI write operation is performed. A 2-byte data is sent over the SPI bus to update the analog output value of the MCP4822 DAC module. Following a successful write operation, the written data are printed on the serial console and the analog output value of the selected channel is randomly updated. Otherwise, a debugging message indicating the failure of the current operation is displayed on the serial console.

'MCP4822 Write SW FSM - Main Execution Path'

Figure 2 MCP4822 Write SW FSM - Main Execution Path

It is essential that developers must not call asynchronous related APIs without guaranteeing that the previous asynchronous transaction is finished. To ensure this, after triggering an asynchronous SPI write transaction, the calling task blocks its execution until the arrival of a freeRTOS signal, indicating the end of the current SPI operation.

'MCP4822 Async Write SW FSM - Callback Function Execution Path'

Figure 3 MCP4822 Async Write SW FSM - Callback Function Execution Path

  1. The selected DAC module consists of a 2-byte register, in which the first four significant bits (MSBits) control the entire behavior of the module. The provided demonstration example exhibits a few macros that can be used for easily configuring the control as well as data bits of the DAC’s control register. For more information on the control bits, read the Serial Interface section in the manufacturer datasheet.

'Control Byte of MCP4822 DAC Chip'

Figure 4 Control & Data bits of MCP4822 DAC Chip


The MCP4822 DAC module has been selected for demonstration purposes only. Providing complete drivers for this module is out of the scope of this tutorial.